Synopsys expands chip design collaboration with TSMC for AI systems
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Synopsys Partners with TSMC to Power Next-Generation AI Systems with Silicon Proven IP and Certified EDA Flows
April 22, 2026 3:00 PM EDTAI-powered digital, analog and verification flows and broad IP solutions deliver exceptional quality of results for TSMC advanced technologies
Successful silicon bring-up of industry's first low-power M-PHY v6.0 IP on TSMC N2P, tape-out of 64G UCIe IP, and 224G IP speeds development of next-generation AI systemsOngoing collaboration on AI-powered digital, analog, and verification flows and power integrity platforms across TSMC advanced nodes to deliver optimized quality of resultsCollaboration on agentic run assistance in Synopsys Fusion Compiler improves PPA and design productivity on TSMC A14 using TSMC NanoFlex Pro... More