SealSQ subsidiary ICAlps targets 2026 prototype for quantum-resistant chips

SealSQ Corp (NASDAQ: LAES) provided an update on its Quantum-Resistant Application-Specific Integrated Circuit initiative, known as QASIC, which is being developed through IC'Alps, its French ASIC design subsidiary.

According to a press release, QASIC combines SealSQ's post-quantum cryptography and secure-semiconductor technologies with IC'Alps' expertise in analog, digital and mixed-signal ASIC design. The initiative primarily targets the cybersecurity, medical and healthcare, and automotive sectors.

SealSQ and IC'Alps said they are working toward a first QASIC prototype in 2026, which is intended to demonstrate the integration of post-quantum security into application-specific semiconductor architectures.

The initiative covers three areas: commercially available catalog integrated circuits with post-quantum security, custom integrated circuits and security intellectual property tailored to specific applications, and secure system architectures including chiplet-based hardware security modules.

IC'Alps' manufacturing ecosystem includes foundry partners such as TSMC, GlobalFoundries, STMicroelectronics, Intel Foundry, X-FAB and ams-OSRAM.

"Cybersecurity, medical devices and automotive systems are among the sectors with the greatest need for long-term, hardware-based protection," said Carlos Moreira, CEO of SealSQ. "These products and infrastructures may remain operational for many years, making it essential to integrate post-quantum security at the semiconductor-design stage."

"The strength of QASIC is its ability to translate advanced post-quantum technologies into specialized and manufacturable semiconductor solutions," said Jean-Luc Triouleyre, General Manager of IC'Alps.

SealSQ said the initiative also supports its broader Quantum Corridor, connecting operations across Switzerland, France, Spain, the United States, Korea and the United Arab Emirates.

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