Synopsys launches autonomous chip design workflows with Microsoft, AMD

Synopsys, Inc. (NASDAQ: SNPS) has introduced two autonomous electronic design automation (EDA) workflows developed in collaboration with Microsoft and evaluated by AMD, available on Microsoft Discovery.

The two workflows, announced at the 2026 DAC Chips to Systems Conference, are described as the first EDA applications available for evaluation on Microsoft Discovery. The first is a fully autonomous debug closure workflow that combines domain-specific and task-level agents to identify design failures and automate debug tasks. Early evaluations show a 25% to 40% reduction in debug cycle time. The second is an autonomous implementation and closure workflow that uses Synopsys' Fusion Compiler on Azure to automate quality-of-results tuning, with initial results showing improved outcomes.

Both workflows are powered by Synopsys' AgentEngineer technology. Customers can request evaluation access through Synopsys. AMD said it is actively evaluating the workflows for use in developing next-generation products.

"AI driven workflows powered by Discovery and leveraging AI tooling, such as RCA with deep EDA domain knowledge, are a paradigm we see accelerating scaling and deployment, helping improve both design velocity and overall silicon quality," said Alex Starr, AMD Corporate Fellow.

Aseem Datar, Corporate Vice President of Product Innovation for Microsoft Discovery and Quantum, said the company is "excited about Synopsys' open, interoperable approach to their agentic platform" and the collaborative effort to make these workflows the first available on Discovery.

The announcement builds on a previously disclosed collaboration that included an agentic specification-to-RTL workflow. Synopsys said the new workflows extend agentic AI from task automation to longer-running engineering execution across the chip design lifecycle.

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