SYNOPSYS unveils AI-powered chip design tools at annual conference

Synopsys Inc. (NASDAQ: SNPS) announced new design and verification solutions at its Synopsys Converge 2026 conference on March 11. The company introduced Multiphysics Fusion technology, which integrates Ansys multiphysics engines into Synopsys' electronic design automation portfolio to address chip design challenges related to electromagnetics, thermal effects and mechanical stress.

The company demonstrated what it describes as an industry-first L4 orchestrated, multi-agent design and verification workflow powered by AgentEngineer technology. This system can generate Register Transfer Level code from natural language, run verification checks and create testbenches. Synopsys stated the workflow helps customers improve productivity by 2x, with some cases showing 5x improvements.

Synopsys also launched Ansys 2026 R1, marking the first major Ansys product release since the acquisition. The release includes AI-driven simulation capabilities and integrations between Synopsys and Ansys technologies across functional safety, materials intelligence and photonics design.

The company introduced new hardware-assisted verification platforms, including HAPS-200 12 FPGA and ZeBu-200 12 FPGA systems. These platforms offer up to 2x higher performance and capacity scaling for AI chip designs.

At the concurrent Embedded World event, Synopsys announced the Electronics Digital Twins Platform for automotive applications. The platform enables up to 90% of software validation before hardware availability, according to the company.

Synopsys initiated a collaboration with AMD and Microsoft to provide faster access to Synopsys EDA tools on Microsoft platforms using AMD compute resources.

The announcements were made during a keynote by Synopsys president and CEO Sassine Ghazi at the Santa Clara Convention Center conference.

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