D-Wave Quantum launches advanced cryogenic packaging initiative

D-Wave Quantum Inc. (NYSE: QBTS) announced a strategic development initiative focused on advanced cryogenic packaging to accelerate quantum processor development for both gate model and annealing systems.

The initiative builds on D-Wave's superconducting cryogenic packaging technology and will expand the company's multichip packaging capabilities, equipment, and processes. The company stated the effort aims to support its cross-platform technology development while maintaining supply chain components.

D-Wave is collaborating with NASA's Jet Propulsion Laboratory, a research facility funded by NASA and managed by Caltech. Using JPL's superconducting bump-bond process, D-Wave demonstrated end-to-end superconducting interconnect between chips. The company expects this work to serve as a foundation for scaling both its annealing architectures and fluxonium-based gate-model architectures.

The company is acquiring equipment and developing processes to increase circuit densities in its superconducting printed-circuit-board manufacturing, which it says is required for scaling to larger processors and supporting analog-digital quantum computing technology.

"Scaling both annealing and gate-model quantum computers requires high performance packaging," said Dr. Trevor Lanting, chief development officer at D-Wave. "We believe this strategic initiative will allow us to further extend our leadership position in quantum systems technology development and support our exciting and aggressive product roadmap on the path to 100,000 qubits."

The packaging initiative addresses requirements including compatibility with ultra-low temperature operation, extremely low magnetic fields, and fully superconducting interconnects from on-chip circuitry through external control wiring, according to the company's press release statement.

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