IBM and Lam Research partner on sub-1nm chip technology development

IBM (NYSE: IBM) and Lam Research Corp. (NASDAQ: LRCX) announced a five-year collaboration to develop processes and materials for sub-1nm logic scaling technology.

The partnership will focus on developing novel materials, fabrication processes, and High NA EUV lithography processes to advance IBM's logic scaling roadmap. The work will target new materials, advanced etch and deposition capabilities for complex device architectures, and new lithography processes for next-generation interconnect and device patterning.

The companies have collaborated for more than a decade on logic fabrication, contributing to 7nm, nanosheet, and EUV process technologies. IBM unveiled its 2nm node chip in 2021.

"Lam has been a critical partner to IBM for over a decade, contributing to key breakthroughs in logic scaling and device architecture such as nanosheet and the world's first 2nm node chip," said Mukesh Khare, GM of IBM Semiconductors and VP of hybrid cloud at IBM Research.

The collaboration will utilize IBM's research capabilities at the NY Creates Albany NanoTech Complex and Lam's process tools, including Aether dry resist technology, Kiyo and Akara etch platforms, and Striker and ALTUS Halo deposition systems. The teams will build and validate process flows for nanosheet and nanostack devices and backside power delivery.

"As the industry enters a new era of 3D scaling, progress depends on rethinking how materials, processes, and lithography come together as a single, high-density system," said Vahid Vahedi, chief technology and sustainability officer at Lam Research.

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