Piper says TSMC capacity sold out through 2028 on strong AI demand

Investing.com -- TSMC's leading edge wafer capacity is sold out through the first half of 2028, according to a Taiwan semiconductor research expert who spoke at a Piper Sandler webinar on Tuesday. The firm's lagging edge capacity for automotive and industrial applications also faces constraints.

TSMC's capital expenditure is expected to grow at approximately 15% annually through 2029, supported by strong AI demand visibility. The expert raised concerns that tool suppliers are having difficulty keeping pace with the capital expenditure increases.

Memory availability remains the biggest system-level risk, with the expert noting that without memory, there can be no compute. High Bandwidth Memory, DRAM and flash shortages are already forcing trade-offs in next generation system design.

Capital expenditure is increasingly limited by what the supply chain can deliver rather than by demand, according to the expert. Tool vendors are struggling to ship to demand, with lithography vendors particularly challenged in keeping pace with extreme ultraviolet builds and upgrades.

TSMC is locking in critical raw materials including custom glass for panel level packaging and photo-resist inputs. The company is closing 6-inch and gallium nitride capacity while gradually trimming 8-inch capacity, with exceptions for automotive and space applications. Engineering is becoming a bottleneck as TSMC faces manpower shortages for its many fabs under construction.

The expert said TSMC holds a six-quarter yield lead over Samsung and an 11-quarter lead over Intel at 2nm equivalent nodes. TSMC's 2nm and 3nm nodes remain the most profitable and are ramping up, with 2027 2nm production targeted at 200,000 wafers per month. A16 is already in risk production.

Advanced packaging capacity using Chip-on-Wafer-on-Substrate technology will remain a bottleneck through 2028 despite planned 40% capacity expansion in 2027 and another 25% in 2028. Customer product mix is broadening beyond GPUs to include CPUs and networking silicon.

TSMC is expected to transition from CoWoS to Chip-on-Panel-on-Substrate with glass substrates potentially in 2029. By moving from a round wafer to a square panel, TSMC can generate 1.6 times more units.

XPU units, which include GPUs and ASICs, are on track for 14 million shipments in 2026. The expert expects this to increase 50% in 2027 and another 40% in 2028. Approximately 66% of the growth is driven by ASIC ramp-up and 33% by GPUs.

Within ASICs, growth in 2027 will likely be led by Google TPU, with Microsoft, Meta and OpenAI ASIC chips each expected to reach nearly 1 million units in 2027. On the GPU side, Nvidia is hedging across multiple rack and architecture versions to manage risk.

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