Lattice Semiconductor (NASDAQ: LSCC) announced the Lattice Mach-N2 FPGA family, a new line of devices built on the Lattice Nexus 2 small FPGA platform and designed for system control and security applications in infrastructure markets.

According to the company's press release, the Mach-N2 family includes integrated flash memory, a hardware Root of Trust, and post-quantum cryptography compliant with CNSA 2.0 standards. Supported algorithms include ML-DSA, LMS, and XMSS for authentication, and ML-KEM for key exchange.

The devices offer up to two times greater logic density compared to prior generations, along with SERDES bandwidth of up to 16 Gbps, PCIe 4.0, and 10G Ethernet connectivity. A 220,000 system logic cell device configures in under 30 milliseconds, according to the company. Up to three stored configuration images are supported for fault recovery.

Esam Elashmawi, Chief Strategy and Marketing Officer at Lattice Semiconductor, said the Mach-N2 "represents a significant step forward in logic density and bandwidth while adding the most complete post-quantum security suite in its class for long-lifecycle systems."

The devices are available for order and samples have already shipped to customers in compute and communications sectors. The Mach-N2 family is supported by Lattice Radiant design software and the newly released Lattice Prompt AI design tool.