QuickLogic Corporation (NASDAQ: QUIK) and PQSecure Technologies announced results of a joint technical collaboration showing that PQSecure's CRYSTAL-1000C post-quantum cryptographic IP core can be implemented as a reprogrammable function within system-on-chips (SoCs) using QuickLogic's embedded FPGA (eFPGA) Hard IP fabric.

The trade study targeted NIST-finalized standards FIPS 203 (ML-KEM) and FIPS 204 (ML-DSA), implementing the CRYSTAL-1000C core on QuickLogic eFPGA Hard IP built for the Intel 18A process node. According to the companies, the PQSecure core was successfully placed and routed within eFPGA IP cores already in use by QuickLogic customers in their ASICs, with what the companies described as sufficient performance for most applications and substantial capacity headroom.

The collaboration allows SoC designers to update cryptographic engines in the field by loading a new bitstream, enabling algorithm parameter swaps, hybrid classical and post-quantum operating modes, or side-channel vulnerability patches without requiring new silicon.

"The post-quantum cryptography transition is an evolving process, not a single event," said Trey Peterson, Field Applications Engineer at QuickLogic. "SoC designers who hard-wire their security engines today face costly, avoidable re-spins."

"Pairing our IP with QuickLogic's reconfigurable fabric future-proofs their hardware without requiring a new tape-out every time the threat landscape evolves," said Luke Beckwith, Senior Hardware Engineer at PQSecure Technologies.

NIST's transition timeline deprecates classical cryptographic algorithms by 2030 and mandates completion of the transition by 2035. According to a study by Markets and Markets Research cited in the announcement, the global post-quantum cryptography market is projected to grow from $420 million in 2025 to over $2.8 billion in 2030.

Detailed performance and resource-utilization data from the trade study is available to qualified customers under a non-disclosure agreement.