D-Wave Quantum Inc. (NYSE: QBTS) announced a gate-model roadmap targeting 100 logical qubits capable of performing over one million operations by 2032. The quantum computing company outlined its approach using dual-rail superconducting architecture and quantum error correction technology.

The roadmap includes specific milestones starting with a 17-physical-qubit system in 2026 that supports logical error rates two times lower than physical error rates. D-Wave plans to progress to a 49-physical-qubit system in 2027 with a 20-fold error reduction factor, followed by a 181-physical-qubit system in 2028 with a 2,000-fold error reduction factor.

By 2030, the company aims to complete a 10-logical-qubit system supporting fault-tolerant algorithms, culminating in the 100-logical-qubit system by 2032 for quantum chemistry and quantum AI applications.

"Our superconducting dual-rail architecture is a fundamentally different approach to fault-tolerant quantum computing that we expect will position D-Wave not only to compete, but also to redefine how quickly the technology becomes commercial," said Dr. Alan Baratz, CEO of D-Wave.

D-Wave's dual-rail qubit architecture embeds error detection directly into qubits, designed to identify approximately 90% of errors as they occur. The company has demonstrated 99.9% two-qubit fidelities, with physical errors occurring about once in every 1,000 operations.

The company targets a Lambda value of 10, compared to the industry standard of around 2. Lambda measures how rapidly quantum computer errors are reduced as error-correction capability is added.

D-Wave operates both annealing and gate-model quantum computing platforms and has delivered six generations of annealing quantum computers. The roadmap details were presented at the company's first Investor Day event.