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ASE develops automated 310mm panel packaging line for AI chips

May 26, 2026 9:00 AM

Advanced Semiconductor Engineering Inc., a unit of ASE Technology Holding Co. (NYSE: ASX), announced development of an automated 310mm × 310mm panel-level packaging production line for semiconductor manufacturing. The facility is scheduled to enter production in the first half of 2027.

The panel-level packaging system supports up to 96,100 mm² of usable area per panel, compared to traditional round wafer formats. The technology is compatible with ASE's FOCoS and FOCoS-Bridge packaging platforms, offering line/space capabilities of 2/2µm and 8/8µm respectively.

The rectangular panel format enables processing of more semiconductor dies per unit compared to circular wafers. ASE stated the technology addresses industry challenges including rising interposer sizes and declining wafer-level efficiency in semiconductor manufacturing.

"ASE is driving a fundamental shift in advanced packaging by introducing an automated panel-level manufacturing platform that significantly improves scalability and efficiency," said Dr. C. P. Hung, Vice President of Corporate Research and Development at ASE.

The packaging line targets applications including artificial intelligence accelerators, high-performance computing devices, networking equipment, gaming hardware, and edge computing systems. ASE characterized the technology as supporting heterogeneous integration of chiplets, application-specific integrated circuits, and high-bandwidth memory components.

ASE Technology Holding trades on the Taiwan Stock Exchange under ticker 3711. The company provides semiconductor assembly and test services globally.

ASE will present the technology at the IEEE Electronic Components and Technology Conference in Orlando, Florida, scheduled for May 26-29, 2026. Chief Executive Officer Dr. Tien Wu will deliver a keynote presentation on advanced packaging technologies.

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