Rambus Inc. (NASDAQ: RMBS) announced a SOCAMM2 chipset designed to enable low-power, high-performance LPDDR5X-based memory modules for AI server platforms. The chipset represents the first product in a planned family of LPDDR-based server module solutions from the company.

The SOCAMM2 chipset supports JEDEC-standard LPDDR5X SOCAMM2 memory modules operating at speeds up to 9.6 Gb/s. SOCAMM2 modules are designed to replace soldered LPDDR memory with detachable, upgradable modules that combine LPDDR efficiency with server-class serviceability in data centers.

The chipset includes an SPD Hub for module identification, configuration, and telemetry, along with 12-amp and 3-amp voltage regulators for localized power conversion. These components provide control, telemetry, and power delivery functions required by JEDEC-standard SOCAMM2 memory modules in AI server environments.

"AI system architectures are evolving rapidly, and memory has become one of the most critical enablers of performance, efficiency, and scalability," said Rami Sethi, senior vice president and general manager of Memory Interface Chips at Rambus. "SOCAMM2 represents an important step in bringing modular, low-power, high-performance memory into next-generation AI servers."

Micron Technology's vice president and general manager of Cloud Memory Products, Praveen Vaidyanathan, stated that SOCAMM2 represents a step toward delivering efficient, scalable, CPU-connected memory designed for AI servers. IDC's associate vice president of memory semiconductors, Soo Kyoum Kim, noted that memory architectures like SOCAMM2 represent an evolution in how systems balance performance with efficiency as AI workloads challenge data center power, bandwidth, and density limits.

The announcement reflects industry collaboration to support new memory architectures optimized for AI data center infrastructure workloads, according to information provided in a company press release.