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   <title>Synopsys launches autonomous chip design workflows with Microsoft, AMD</title>
   <link>http://www.streetinsider.com/Corporate+News/Synopsys+launches+autonomous+chip+design+workflows+with+Microsoft%2C+AMD/26817013.html</link>
   <description>&lt;p&gt;Synopsys, Inc. (NASDAQ: SNPS) has introduced two autonomous electronic design automation (EDA) workflows developed in collaboration with Microsoft and evaluated by AMD, available on Microsoft Discovery.&lt;/p&gt;&lt;p&gt;The two workflows, announced at the 2026 DAC Chips to Systems Conference, are described as the first EDA applications available for evaluation on Microsoft Discovery. The first is a fully autonomous debug closure workflow that combines domain-specific and task-level agents to identify design failures and automate debug tasks. Early evaluations show a 25% to 40% reduction in debug cycle time. The second is an autonomous implementation and closure workflow that uses Synopsys' Fusion Compiler on</description>
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   <pubDate>Mon, 27 Jul 2026 09:01:23 -0400</pubDate>
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   <title>Synopsys launches autonomous chip design workflows with Microsoft, AMD</title>
   <link>http://www.streetinsider.com/Corporate+News/Synopsys+launches+autonomous+chip+design+workflows+with+Microsoft%2C+AMD/26817013.html</link>
   <description>&lt;p&gt;Synopsys, Inc. (NASDAQ: SNPS) has introduced two autonomous electronic design automation (EDA) workflows developed in collaboration with Microsoft and evaluated by AMD, available on Microsoft Discovery.&lt;/p&gt;&lt;p&gt;The two workflows, announced at the 2026 DAC Chips to Systems Conference, are described as the first EDA applications available for evaluation on Microsoft Discovery. The first is a fully autonomous debug closure workflow that combines domain-specific and task-level agents to identify design failures and automate debug tasks. Early evaluations show a 25% to 40% reduction in debug cycle time. The second is an autonomous implementation and closure workflow that uses Synopsys' Fusion Compiler on</description>
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   <title>Synopsys launches autonomous chip design workflows with Microsoft, AMD</title>
   <link>http://www.streetinsider.com/Corporate+News/Synopsys+launches+autonomous+chip+design+workflows+with+Microsoft%2C+AMD/26817013.html</link>
   <description>&lt;p&gt;Synopsys, Inc. (NASDAQ: SNPS) has introduced two autonomous electronic design automation (EDA) workflows developed in collaboration with Microsoft and evaluated by AMD, available on Microsoft Discovery.&lt;/p&gt;&lt;p&gt;The two workflows, announced at the 2026 DAC Chips to Systems Conference, are described as the first EDA applications available for evaluation on Microsoft Discovery. The first is a fully autonomous debug closure workflow that combines domain-specific and task-level agents to identify design failures and automate debug tasks. Early evaluations show a 25% to 40% reduction in debug cycle time. The second is an autonomous implementation and closure workflow that uses Synopsys' Fusion Compiler on</description>
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   <title>Synopsys launches autonomous chip design workflows with Microsoft, AMD</title>
   <link>http://www.streetinsider.com/Hot+Corp.+News/Synopsys+launches+autonomous+chip+design+workflows+with+Microsoft%2C+AMD/26817013.html</link>
   <description>&lt;p&gt;Synopsys, Inc. (NASDAQ: SNPS) has introduced two autonomous electronic design automation (EDA) workflows developed in collaboration with Microsoft and evaluated by AMD, available on Microsoft Discovery.&lt;/p&gt;&lt;p&gt;The two workflows, announced at the 2026 DAC Chips to Systems Conference, are described as the first EDA applications available for evaluation on Microsoft Discovery. The first is a fully autonomous debug closure workflow that combines domain-specific and task-level agents to identify design failures and automate debug tasks. Early evaluations show a 25% to 40% reduction in debug cycle time. The second is an autonomous implementation and closure workflow that uses Synopsys' Fusion Compiler on</description>
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   <pubDate>Mon, 27 Jul 2026 09:01:23 -0400</pubDate>
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   <title>Synopsys launches autonomous chip design workflows with Microsoft, AMD</title>
   <link>http://www.streetinsider.com/Hot+Corp.+News/Synopsys+launches+autonomous+chip+design+workflows+with+Microsoft%2C+AMD/26817013.html</link>
   <description>&lt;p&gt;Synopsys, Inc. (NASDAQ: SNPS) has introduced two autonomous electronic design automation (EDA) workflows developed in collaboration with Microsoft and evaluated by AMD, available on Microsoft Discovery.&lt;/p&gt;&lt;p&gt;The two workflows, announced at the 2026 DAC Chips to Systems Conference, are described as the first EDA applications available for evaluation on Microsoft Discovery. The first is a fully autonomous debug closure workflow that combines domain-specific and task-level agents to identify design failures and automate debug tasks. Early evaluations show a 25% to 40% reduction in debug cycle time. The second is an autonomous implementation and closure workflow that uses Synopsys' Fusion Compiler on</description>
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   <pubDate>Mon, 27 Jul 2026 09:01:23 -0400</pubDate>
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   <title>Synopsys launches autonomous chip design workflows with Microsoft, AMD</title>
   <link>http://www.streetinsider.com/Hot+Corp.+News/Synopsys+launches+autonomous+chip+design+workflows+with+Microsoft%2C+AMD/26817013.html</link>
   <description>&lt;p&gt;Synopsys, Inc. (NASDAQ: SNPS) has introduced two autonomous electronic design automation (EDA) workflows developed in collaboration with Microsoft and evaluated by AMD, available on Microsoft Discovery.&lt;/p&gt;&lt;p&gt;The two workflows, announced at the 2026 DAC Chips to Systems Conference, are described as the first EDA applications available for evaluation on Microsoft Discovery. The first is a fully autonomous debug closure workflow that combines domain-specific and task-level agents to identify design failures and automate debug tasks. Early evaluations show a 25% to 40% reduction in debug cycle time. The second is an autonomous implementation and closure workflow that uses Synopsys' Fusion Compiler on</description>
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   <pubDate>Mon, 27 Jul 2026 09:01:23 -0400</pubDate>
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   <title>Synopsys expands Intel Foundry collaboration for Intel 14A process</title>
   <link>http://www.streetinsider.com/Corporate+News/Synopsys+expands+Intel+Foundry+collaboration+for+Intel+14A+process/26816992.html</link>
   <description>&lt;p&gt;Synopsys, Inc. (Nasdaq: SNPS) announced an expanded collaboration with Intel Foundry at the 2026 DAC Chips to Systems Conference, including the certification of AI-powered electronic design automation flows on Intel's 14A process technology.&lt;/p&gt;&lt;p&gt;The collaboration extends co-optimization across silicon, packaging, IP, and system domains. Synopsys said its 3DIC Compiler platform now supports Intel's Embedded Multi-die Interconnect Bridge (EMIB) and EMIB-T advanced packaging technologies, enabling multi-die chip designs with integrated power, thermal, and signal integrity analysis.&lt;/p&gt;&lt;p&gt;Synopsys also announced an expanded IP portfolio for Intel 14A, including interface IP such as 224G SerDes, PCIe 7.0, USB 4, and eUSB, along with foundation IP</description>
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   <pubDate>Mon, 27 Jul 2026 09:00:59 -0400</pubDate>
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   <title>Synopsys expands Intel Foundry collaboration for Intel 14A process</title>
   <link>http://www.streetinsider.com/Corporate+News/Synopsys+expands+Intel+Foundry+collaboration+for+Intel+14A+process/26816992.html</link>
   <description>&lt;p&gt;Synopsys, Inc. (Nasdaq: SNPS) announced an expanded collaboration with Intel Foundry at the 2026 DAC Chips to Systems Conference, including the certification of AI-powered electronic design automation flows on Intel's 14A process technology.&lt;/p&gt;&lt;p&gt;The collaboration extends co-optimization across silicon, packaging, IP, and system domains. Synopsys said its 3DIC Compiler platform now supports Intel's Embedded Multi-die Interconnect Bridge (EMIB) and EMIB-T advanced packaging technologies, enabling multi-die chip designs with integrated power, thermal, and signal integrity analysis.&lt;/p&gt;&lt;p&gt;Synopsys also announced an expanded IP portfolio for Intel 14A, including interface IP such as 224G SerDes, PCIe 7.0, USB 4, and eUSB, along with foundation IP</description>
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   <title>Synopsys and Intel Foundry Fast-Track Customer Readiness from Silicon to Systems on Intel 14A</title>
   <link>http://www.streetinsider.com/Press+Releases/Synopsys+and+Intel+Foundry+Fast-Track+Customer+Readiness+from+Silicon+to+Systems+on+Intel+14A/26816946.html</link>
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&lt;p class=&quot;prntac&quot;&gt;&lt;i&gt;Certified AI-powered EDA flows, integrated multiphysics analysis, and broad IP portfolio accelerate Angstrom-scale AI and multi-die &lt;/i&gt;&lt;i&gt;designs&lt;/i&gt;&lt;/p&gt;&lt;p&gt;&lt;b&gt;Key Highlights&lt;/b&gt;&lt;/p&gt;&lt;ul type=&quot;disc&quot;&gt;&lt;li&gt;&lt;b&gt;Certified AI-powered EDA flows and multiphysics analysis for Intel 14A designs:&lt;/b&gt; Provide early insight into power integrity, thermal, and electromagnetic effects, improving predictability and accelerating convergence&lt;/li&gt;&lt;li&gt;&lt;b&gt;From DTCO to system-aware co-optimization&lt;/b&gt;: Extends co-optimization across silicon, package, IP and system domains to enable full system realization with optimal PPA&lt;/li&gt;&lt;li&gt;&lt;b&gt;Multi-die and advanced packaging leadership&lt;/b&gt;: &lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys&lt;/span&gt; 3DIC Compiler platform extends exploration-to-signoff support to designs integrated with Intel EMIB and Intel EMIB-T, enabling multi-die designs&lt;/li&gt;&lt;li&gt;&lt;b&gt;Broad IP portfolio for faster time-to-tapeout&lt;/b&gt;: Interface and Foundation IP</description>
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   <title>Synopsys and Intel Foundry Fast-Track Customer Readiness from Silicon to Systems on Intel 14A</title>
   <link>http://www.streetinsider.com/Press+Releases/Synopsys+and+Intel+Foundry+Fast-Track+Customer+Readiness+from+Silicon+to+Systems+on+Intel+14A/26816946.html</link>
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&lt;p class=&quot;prntac&quot;&gt;&lt;i&gt;Certified AI-powered EDA flows, integrated multiphysics analysis, and broad IP portfolio accelerate Angstrom-scale AI and multi-die &lt;/i&gt;&lt;i&gt;designs&lt;/i&gt;&lt;/p&gt;&lt;p&gt;&lt;b&gt;Key Highlights&lt;/b&gt;&lt;/p&gt;&lt;ul type=&quot;disc&quot;&gt;&lt;li&gt;&lt;b&gt;Certified AI-powered EDA flows and multiphysics analysis for Intel 14A designs:&lt;/b&gt; Provide early insight into power integrity, thermal, and electromagnetic effects, improving predictability and accelerating convergence&lt;/li&gt;&lt;li&gt;&lt;b&gt;From DTCO to system-aware co-optimization&lt;/b&gt;: Extends co-optimization across silicon, package, IP and system domains to enable full system realization with optimal PPA&lt;/li&gt;&lt;li&gt;&lt;b&gt;Multi-die and advanced packaging leadership&lt;/b&gt;: &lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys&lt;/span&gt; 3DIC Compiler platform extends exploration-to-signoff support to designs integrated with Intel EMIB and Intel EMIB-T, enabling multi-die designs&lt;/li&gt;&lt;li&gt;&lt;b&gt;Broad IP portfolio for faster time-to-tapeout&lt;/b&gt;: Interface and Foundation IP</description>
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   <title>Synopsys and Intel Foundry Fast-Track Customer Readiness from Silicon to Systems on Intel 14A</title>
   <link>http://www.streetinsider.com/Press+Releases/Synopsys+and+Intel+Foundry+Fast-Track+Customer+Readiness+from+Silicon+to+Systems+on+Intel+14A/26816946.html</link>
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&lt;p class=&quot;prntac&quot;&gt;&lt;i&gt;Certified AI-powered EDA flows, integrated multiphysics analysis, and broad IP portfolio accelerate Angstrom-scale AI and multi-die &lt;/i&gt;&lt;i&gt;designs&lt;/i&gt;&lt;/p&gt;&lt;p&gt;&lt;b&gt;Key Highlights&lt;/b&gt;&lt;/p&gt;&lt;ul type=&quot;disc&quot;&gt;&lt;li&gt;&lt;b&gt;Certified AI-powered EDA flows and multiphysics analysis for Intel 14A designs:&lt;/b&gt; Provide early insight into power integrity, thermal, and electromagnetic effects, improving predictability and accelerating convergence&lt;/li&gt;&lt;li&gt;&lt;b&gt;From DTCO to system-aware co-optimization&lt;/b&gt;: Extends co-optimization across silicon, package, IP and system domains to enable full system realization with optimal PPA&lt;/li&gt;&lt;li&gt;&lt;b&gt;Multi-die and advanced packaging leadership&lt;/b&gt;: &lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys&lt;/span&gt; 3DIC Compiler platform extends exploration-to-signoff support to designs integrated with Intel EMIB and Intel EMIB-T, enabling multi-die designs&lt;/li&gt;&lt;li&gt;&lt;b&gt;Broad IP portfolio for faster time-to-tapeout&lt;/b&gt;: Interface and Foundation IP</description>
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   <title>Synopsys and Intel Foundry Fast-Track Customer Readiness from Silicon to Systems on Intel 14A</title>
   <link>http://www.streetinsider.com/Press+Releases/Synopsys+and+Intel+Foundry+Fast-Track+Customer+Readiness+from+Silicon+to+Systems+on+Intel+14A/26816946.html</link>
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   <title>Synopsys and Intel Foundry Fast-Track Customer Readiness from Silicon to Systems on Intel 14A</title>
   <link>http://www.streetinsider.com/PRNewswire/Synopsys+and+Intel+Foundry+Fast-Track+Customer+Readiness+from+Silicon+to+Systems+on+Intel+14A/26816946.html</link>
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   <title>Synopsys and Intel Foundry Fast-Track Customer Readiness from Silicon to Systems on Intel 14A</title>
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&lt;p class=&quot;prntac&quot;&gt;&lt;i&gt;Certified AI-powered EDA flows, integrated multiphysics analysis, and broad IP portfolio accelerate Angstrom-scale AI and multi-die &lt;/i&gt;&lt;i&gt;designs&lt;/i&gt;&lt;/p&gt;&lt;p&gt;&lt;b&gt;Key Highlights&lt;/b&gt;&lt;/p&gt;&lt;ul type=&quot;disc&quot;&gt;&lt;li&gt;&lt;b&gt;Certified AI-powered EDA flows and multiphysics analysis for Intel 14A designs:&lt;/b&gt; Provide early insight into power integrity, thermal, and electromagnetic effects, improving predictability and accelerating convergence&lt;/li&gt;&lt;li&gt;&lt;b&gt;From DTCO to system-aware co-optimization&lt;/b&gt;: Extends co-optimization across silicon, package, IP and system domains to enable full system realization with optimal PPA&lt;/li&gt;&lt;li&gt;&lt;b&gt;Multi-die and advanced packaging leadership&lt;/b&gt;: &lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys&lt;/span&gt; 3DIC Compiler platform extends exploration-to-signoff support to designs integrated with Intel EMIB and Intel EMIB-T, enabling multi-die designs&lt;/li&gt;&lt;li&gt;&lt;b&gt;Broad IP portfolio for faster time-to-tapeout&lt;/b&gt;: Interface and Foundation IP</description>
   <guid isPermaLink="true">http://www.streetinsider.com/PRNewswire/Synopsys+and+Intel+Foundry+Fast-Track+Customer+Readiness+from+Silicon+to+Systems+on+Intel+14A/26816946.html</guid>
   <pubDate>Mon, 27 Jul 2026 09:00:00 -0400</pubDate>
      	<category domain="http://rss.financialcontent.com/stocksymbol">A.50204642</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">O.00082314</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">O.00163521</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">SNPS</category>
   	  </item>
  <item>
   <title>Synopsys and Intel Foundry Fast-Track Customer Readiness from Silicon to Systems on Intel 14A</title>
   <link>http://www.streetinsider.com/PRNewswire/Synopsys+and+Intel+Foundry+Fast-Track+Customer+Readiness+from+Silicon+to+Systems+on+Intel+14A/26816946.html</link>
   <description>
&lt;div class=&quot;xn-content&quot;&gt;
&lt;p class=&quot;prntac&quot;&gt;&lt;i&gt;Certified AI-powered EDA flows, integrated multiphysics analysis, and broad IP portfolio accelerate Angstrom-scale AI and multi-die &lt;/i&gt;&lt;i&gt;designs&lt;/i&gt;&lt;/p&gt;&lt;p&gt;&lt;b&gt;Key Highlights&lt;/b&gt;&lt;/p&gt;&lt;ul type=&quot;disc&quot;&gt;&lt;li&gt;&lt;b&gt;Certified AI-powered EDA flows and multiphysics analysis for Intel 14A designs:&lt;/b&gt; Provide early insight into power integrity, thermal, and electromagnetic effects, improving predictability and accelerating convergence&lt;/li&gt;&lt;li&gt;&lt;b&gt;From DTCO to system-aware co-optimization&lt;/b&gt;: Extends co-optimization across silicon, package, IP and system domains to enable full system realization with optimal PPA&lt;/li&gt;&lt;li&gt;&lt;b&gt;Multi-die and advanced packaging leadership&lt;/b&gt;: &lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys&lt;/span&gt; 3DIC Compiler platform extends exploration-to-signoff support to designs integrated with Intel EMIB and Intel EMIB-T, enabling multi-die designs&lt;/li&gt;&lt;li&gt;&lt;b&gt;Broad IP portfolio for faster time-to-tapeout&lt;/b&gt;: Interface and Foundation IP</description>
   <guid isPermaLink="true">http://www.streetinsider.com/PRNewswire/Synopsys+and+Intel+Foundry+Fast-Track+Customer+Readiness+from+Silicon+to+Systems+on+Intel+14A/26816946.html</guid>
   <pubDate>Mon, 27 Jul 2026 09:00:00 -0400</pubDate>
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   	   	<category domain="http://rss.financialcontent.com/stocksymbol">O.00163521</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">SNPS</category>
   	  </item>
  <item>
   <title>Synopsys and Intel Foundry Fast-Track Customer Readiness from Silicon to Systems on Intel 14A</title>
   <link>http://www.streetinsider.com/PRNewswire/Synopsys+and+Intel+Foundry+Fast-Track+Customer+Readiness+from+Silicon+to+Systems+on+Intel+14A/26816946.html</link>
   <description>
&lt;div class=&quot;xn-content&quot;&gt;
&lt;p class=&quot;prntac&quot;&gt;&lt;i&gt;Certified AI-powered EDA flows, integrated multiphysics analysis, and broad IP portfolio accelerate Angstrom-scale AI and multi-die &lt;/i&gt;&lt;i&gt;designs&lt;/i&gt;&lt;/p&gt;&lt;p&gt;&lt;b&gt;Key Highlights&lt;/b&gt;&lt;/p&gt;&lt;ul type=&quot;disc&quot;&gt;&lt;li&gt;&lt;b&gt;Certified AI-powered EDA flows and multiphysics analysis for Intel 14A designs:&lt;/b&gt; Provide early insight into power integrity, thermal, and electromagnetic effects, improving predictability and accelerating convergence&lt;/li&gt;&lt;li&gt;&lt;b&gt;From DTCO to system-aware co-optimization&lt;/b&gt;: Extends co-optimization across silicon, package, IP and system domains to enable full system realization with optimal PPA&lt;/li&gt;&lt;li&gt;&lt;b&gt;Multi-die and advanced packaging leadership&lt;/b&gt;: &lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys&lt;/span&gt; 3DIC Compiler platform extends exploration-to-signoff support to designs integrated with Intel EMIB and Intel EMIB-T, enabling multi-die designs&lt;/li&gt;&lt;li&gt;&lt;b&gt;Broad IP portfolio for faster time-to-tapeout&lt;/b&gt;: Interface and Foundation IP</description>
   <guid isPermaLink="true">http://www.streetinsider.com/PRNewswire/Synopsys+and+Intel+Foundry+Fast-Track+Customer+Readiness+from+Silicon+to+Systems+on+Intel+14A/26816946.html</guid>
   <pubDate>Mon, 27 Jul 2026 09:00:00 -0400</pubDate>
      	<category domain="http://rss.financialcontent.com/stocksymbol">A.50204642</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">O.00082314</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">O.00163521</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">SNPS</category>
   	  </item>
  <item>
   <title>Synopsys Advances Agentic AI Chip Design with AMD and Microsoft</title>
   <link>http://www.streetinsider.com/Press+Releases/Synopsys+Advances+Agentic+AI+Chip+Design+with+AMD+and+Microsoft/26816949.html</link>
   <description>
&lt;div class=&quot;xn-content&quot;&gt;
&lt;p class=&quot;prntal&quot;&gt;&lt;i&gt;Introduces Industry's First Autonomous EDA Workflows on Microsoft Discovery to Accelerate Engineering from Specification to Silicon&lt;/i&gt;&lt;/p&gt;&lt;p&gt;&lt;b&gt;Key Highlights &lt;/b&gt;&lt;/p&gt;&lt;ul type=&quot;disc&quot;&gt;&lt;li&gt;&lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys&lt;/span&gt; is advancing an open, interoperable agentic AI stack for autonomous workflows across the chip design lifecycle.&lt;/li&gt;&lt;li&gt;Introducing two new agentic EDA workflows, developed in collaboration with Microsoft and used by AMD, available for evaluation on Microsoft Discovery to accelerate chip design.&lt;/li&gt;&lt;li&gt;Fully-autonomous debug closure workflow initial results demonstrate up to 40% reduction in cycle time&lt;/li&gt;&lt;/ul&gt;&lt;p&gt;&lt;span class=&quot;legendSpanClass&quot;&gt;&lt;location value=&quot;LU/us.ca.sunyvl&quot; idsrc=&quot;xmltag.org&quot; &gt;SUNNYVALE, Calif.&lt;/location&gt;&lt;/span&gt;, &lt;span class=&quot;legendSpanClass&quot;&gt;&lt;chron&gt;July 27, 2026&lt;/chron&gt;&lt;/span&gt; /PRNewswire/ -- &lt;a target=&quot;_blank&quot; href=&quot;https://edge.prnewswire.com/c/link/?t=0&amp;amp;l=en&amp;amp;o=4739039-1&amp;amp;h=1649944988&amp;amp;u=https%3A%2F%2Fwww.synopsys.com%2F&amp;amp;a=Synopsys%2C+Inc&quot; target=&quot;_blank&quot; rel=&quot;nofollow&quot;&gt;&lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys, Inc&lt;/span&gt;&lt;/a&gt;. (NASDAQ: SNPS) announced</description>
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   <pubDate>Mon, 27 Jul 2026 09:00:00 -0400</pubDate>
      	<category domain="http://rss.financialcontent.com/stocksymbol">O.00082314</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">SNPS</category>
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  <item>
   <title>Synopsys Advances Agentic AI Chip Design with AMD and Microsoft</title>
   <link>http://www.streetinsider.com/Press+Releases/Synopsys+Advances+Agentic+AI+Chip+Design+with+AMD+and+Microsoft/26816949.html</link>
   <description>
&lt;div class=&quot;xn-content&quot;&gt;
&lt;p class=&quot;prntal&quot;&gt;&lt;i&gt;Introduces Industry's First Autonomous EDA Workflows on Microsoft Discovery to Accelerate Engineering from Specification to Silicon&lt;/i&gt;&lt;/p&gt;&lt;p&gt;&lt;b&gt;Key Highlights &lt;/b&gt;&lt;/p&gt;&lt;ul type=&quot;disc&quot;&gt;&lt;li&gt;&lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys&lt;/span&gt; is advancing an open, interoperable agentic AI stack for autonomous workflows across the chip design lifecycle.&lt;/li&gt;&lt;li&gt;Introducing two new agentic EDA workflows, developed in collaboration with Microsoft and used by AMD, available for evaluation on Microsoft Discovery to accelerate chip design.&lt;/li&gt;&lt;li&gt;Fully-autonomous debug closure workflow initial results demonstrate up to 40% reduction in cycle time&lt;/li&gt;&lt;/ul&gt;&lt;p&gt;&lt;span class=&quot;legendSpanClass&quot;&gt;&lt;location value=&quot;LU/us.ca.sunyvl&quot; idsrc=&quot;xmltag.org&quot; &gt;SUNNYVALE, Calif.&lt;/location&gt;&lt;/span&gt;, &lt;span class=&quot;legendSpanClass&quot;&gt;&lt;chron&gt;July 27, 2026&lt;/chron&gt;&lt;/span&gt; /PRNewswire/ -- &lt;a target=&quot;_blank&quot; href=&quot;https://edge.prnewswire.com/c/link/?t=0&amp;amp;l=en&amp;amp;o=4739039-1&amp;amp;h=1649944988&amp;amp;u=https%3A%2F%2Fwww.synopsys.com%2F&amp;amp;a=Synopsys%2C+Inc&quot; target=&quot;_blank&quot; rel=&quot;nofollow&quot;&gt;&lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys, Inc&lt;/span&gt;&lt;/a&gt;. (NASDAQ: SNPS) announced</description>
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   <pubDate>Mon, 27 Jul 2026 09:00:00 -0400</pubDate>
      	<category domain="http://rss.financialcontent.com/stocksymbol">O.00082314</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">SNPS</category>
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  <item>
   <title>Synopsys Advances Agentic AI Chip Design with AMD and Microsoft</title>
   <link>http://www.streetinsider.com/PRNewswire/Synopsys+Advances+Agentic+AI+Chip+Design+with+AMD+and+Microsoft/26816949.html</link>
   <description>
&lt;div class=&quot;xn-content&quot;&gt;
&lt;p class=&quot;prntal&quot;&gt;&lt;i&gt;Introduces Industry's First Autonomous EDA Workflows on Microsoft Discovery to Accelerate Engineering from Specification to Silicon&lt;/i&gt;&lt;/p&gt;&lt;p&gt;&lt;b&gt;Key Highlights &lt;/b&gt;&lt;/p&gt;&lt;ul type=&quot;disc&quot;&gt;&lt;li&gt;&lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys&lt;/span&gt; is advancing an open, interoperable agentic AI stack for autonomous workflows across the chip design lifecycle.&lt;/li&gt;&lt;li&gt;Introducing two new agentic EDA workflows, developed in collaboration with Microsoft and used by AMD, available for evaluation on Microsoft Discovery to accelerate chip design.&lt;/li&gt;&lt;li&gt;Fully-autonomous debug closure workflow initial results demonstrate up to 40% reduction in cycle time&lt;/li&gt;&lt;/ul&gt;&lt;p&gt;&lt;span class=&quot;legendSpanClass&quot;&gt;&lt;location value=&quot;LU/us.ca.sunyvl&quot; idsrc=&quot;xmltag.org&quot; &gt;SUNNYVALE, Calif.&lt;/location&gt;&lt;/span&gt;, &lt;span class=&quot;legendSpanClass&quot;&gt;&lt;chron&gt;July 27, 2026&lt;/chron&gt;&lt;/span&gt; /PRNewswire/ -- &lt;a target=&quot;_blank&quot; href=&quot;https://edge.prnewswire.com/c/link/?t=0&amp;amp;l=en&amp;amp;o=4739039-1&amp;amp;h=1649944988&amp;amp;u=https%3A%2F%2Fwww.synopsys.com%2F&amp;amp;a=Synopsys%2C+Inc&quot; target=&quot;_blank&quot; rel=&quot;nofollow&quot;&gt;&lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys, Inc&lt;/span&gt;&lt;/a&gt;. (NASDAQ: SNPS) announced</description>
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   <pubDate>Mon, 27 Jul 2026 09:00:00 -0400</pubDate>
      	<category domain="http://rss.financialcontent.com/stocksymbol">O.00082314</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">SNPS</category>
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  <item>
   <title>Synopsys Advances Agentic AI Chip Design with AMD and Microsoft</title>
   <link>http://www.streetinsider.com/PRNewswire/Synopsys+Advances+Agentic+AI+Chip+Design+with+AMD+and+Microsoft/26816949.html</link>
   <description>
&lt;div class=&quot;xn-content&quot;&gt;
&lt;p class=&quot;prntal&quot;&gt;&lt;i&gt;Introduces Industry's First Autonomous EDA Workflows on Microsoft Discovery to Accelerate Engineering from Specification to Silicon&lt;/i&gt;&lt;/p&gt;&lt;p&gt;&lt;b&gt;Key Highlights &lt;/b&gt;&lt;/p&gt;&lt;ul type=&quot;disc&quot;&gt;&lt;li&gt;&lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys&lt;/span&gt; is advancing an open, interoperable agentic AI stack for autonomous workflows across the chip design lifecycle.&lt;/li&gt;&lt;li&gt;Introducing two new agentic EDA workflows, developed in collaboration with Microsoft and used by AMD, available for evaluation on Microsoft Discovery to accelerate chip design.&lt;/li&gt;&lt;li&gt;Fully-autonomous debug closure workflow initial results demonstrate up to 40% reduction in cycle time&lt;/li&gt;&lt;/ul&gt;&lt;p&gt;&lt;span class=&quot;legendSpanClass&quot;&gt;&lt;location value=&quot;LU/us.ca.sunyvl&quot; idsrc=&quot;xmltag.org&quot; &gt;SUNNYVALE, Calif.&lt;/location&gt;&lt;/span&gt;, &lt;span class=&quot;legendSpanClass&quot;&gt;&lt;chron&gt;July 27, 2026&lt;/chron&gt;&lt;/span&gt; /PRNewswire/ -- &lt;a target=&quot;_blank&quot; href=&quot;https://edge.prnewswire.com/c/link/?t=0&amp;amp;l=en&amp;amp;o=4739039-1&amp;amp;h=1649944988&amp;amp;u=https%3A%2F%2Fwww.synopsys.com%2F&amp;amp;a=Synopsys%2C+Inc&quot; target=&quot;_blank&quot; rel=&quot;nofollow&quot;&gt;&lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys, Inc&lt;/span&gt;&lt;/a&gt;. (NASDAQ: SNPS) announced</description>
   <guid isPermaLink="true">http://www.streetinsider.com/PRNewswire/Synopsys+Advances+Agentic+AI+Chip+Design+with+AMD+and+Microsoft/26816949.html</guid>
   <pubDate>Mon, 27 Jul 2026 09:00:00 -0400</pubDate>
      	<category domain="http://rss.financialcontent.com/stocksymbol">O.00082314</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">SNPS</category>
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  <item>
   <title>Synopsys unveils agentic chip design tools built with Nvidia</title>
   <link>http://www.streetinsider.com/Corporate+News/Synopsys+unveils+agentic+chip+design+tools+built+with+Nvidia/26815449.html</link>
   <description>&lt;p&gt;Synopsys, Inc. (NASDAQ: SNPS) announced a set of autonomous, AI-driven engineering workflows at the 2026 DAC Chips to Systems Conference, developed in collaboration with Nvidia.&lt;/p&gt;&lt;p&gt;The announcements center on a fully autonomous design verification agent built on Synopsys' AgentEngineer technology and Nvidia's agentic AI infrastructure, including the Nvidia Agent Toolkit, Nvidia Nemotron 3 Ultra model, and OpenShell runtime. According to the company, the workflow compresses chip verification from weeks to hours, delivering up to 50 times faster time-to-validated RTL and a 20% improvement in coverage compared to traditional verification workflows not powered by AgentEngineer technology.&lt;/p&gt;&lt;p&gt;Synopsys also demonstrated its first autonomous computer-aided</description>
   <guid isPermaLink="true">http://www.streetinsider.com/Corporate+News/Synopsys+unveils+agentic+chip+design+tools+built+with+Nvidia/26815449.html</guid>
   <pubDate>Mon, 27 Jul 2026 06:03:58 -0400</pubDate>
      	<category domain="http://rss.financialcontent.com/stocksymbol">SNPS</category>
   	  </item>
  <item>
   <title>Synopsys Showcases Comprehensive Autonomous Engineering Workflows from Silicon to Systems, Developed with NVIDIA Technology</title>
   <link>http://www.streetinsider.com/Press+Releases/Synopsys+Showcases+Comprehensive+Autonomous+Engineering+Workflows+from+Silicon+to+Systems%2C+Developed+with+NVIDIA+Technology/26814896.html</link>
   <description>
&lt;div class=&quot;xn-content&quot;&gt;
&lt;p class=&quot;prntac&quot;&gt;&lt;i&gt;New long-running, fully agentic workflows spanning EDA to CAE multiply engineering productivity &lt;/i&gt;&lt;/p&gt;&lt;p&gt;&lt;b&gt;Key Highlights&lt;/b&gt;&lt;/p&gt;&lt;ul type=&quot;disc&quot;&gt;&lt;li&gt;&lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys&lt;/span&gt; unveils a fully autonomous long-running design verification agent that orchestrates the entire chip verification cycle delivering up to 50X faster time-to-validated RTL while achieving 20% additional coverage improvement&lt;/li&gt;&lt;li&gt;Demonstrating Synopsys' first fully autonomous computer-aided engineering (CAE) workflow for thermal management and electronic device cooling capable of autonomously executing set-up, pre-processing, and post-processing in a fraction of the time required for manual approaches &lt;/li&gt;&lt;li&gt;Expanded portfolio of more than 20 GPU-accelerated Synopsys EDA and multiphysics products, including 18X speedup of &lt;a target=&quot;_blank&quot; href=&quot;https://edge.prnewswire.com/c/link/?t=0&amp;amp;l=en&amp;amp;o=4738942-1&amp;amp;h=2407958161&amp;amp;u=https%3A%2F%2Fwww.synopsys.com%2Fimplementation-and-signoff%2Fams-simulation%2Fprimesim-spice.html&amp;amp;a=PrimeSim%E2%84%A2+SPICE&quot; target=&quot;_blank&quot;</description>
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   <pubDate>Sun, 26 Jul 2026 20:45:00 -0400</pubDate>
      	<category domain="http://rss.financialcontent.com/stocksymbol">A.30057053</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">O.00082314</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">O.00175295</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">SNPS</category>
   	  </item>
  <item>
   <title>Synopsys Showcases Comprehensive Autonomous Engineering Workflows from Silicon to Systems, Developed with NVIDIA Technology</title>
   <link>http://www.streetinsider.com/Press+Releases/Synopsys+Showcases+Comprehensive+Autonomous+Engineering+Workflows+from+Silicon+to+Systems%2C+Developed+with+NVIDIA+Technology/26814896.html</link>
   <description>
&lt;div class=&quot;xn-content&quot;&gt;
&lt;p class=&quot;prntac&quot;&gt;&lt;i&gt;New long-running, fully agentic workflows spanning EDA to CAE multiply engineering productivity &lt;/i&gt;&lt;/p&gt;&lt;p&gt;&lt;b&gt;Key Highlights&lt;/b&gt;&lt;/p&gt;&lt;ul type=&quot;disc&quot;&gt;&lt;li&gt;&lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys&lt;/span&gt; unveils a fully autonomous long-running design verification agent that orchestrates the entire chip verification cycle delivering up to 50X faster time-to-validated RTL while achieving 20% additional coverage improvement&lt;/li&gt;&lt;li&gt;Demonstrating Synopsys' first fully autonomous computer-aided engineering (CAE) workflow for thermal management and electronic device cooling capable of autonomously executing set-up, pre-processing, and post-processing in a fraction of the time required for manual approaches &lt;/li&gt;&lt;li&gt;Expanded portfolio of more than 20 GPU-accelerated Synopsys EDA and multiphysics products, including 18X speedup of &lt;a target=&quot;_blank&quot; href=&quot;https://edge.prnewswire.com/c/link/?t=0&amp;amp;l=en&amp;amp;o=4738942-1&amp;amp;h=2407958161&amp;amp;u=https%3A%2F%2Fwww.synopsys.com%2Fimplementation-and-signoff%2Fams-simulation%2Fprimesim-spice.html&amp;amp;a=PrimeSim%E2%84%A2+SPICE&quot; target=&quot;_blank&quot;</description>
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   <pubDate>Sun, 26 Jul 2026 20:45:00 -0400</pubDate>
      	<category domain="http://rss.financialcontent.com/stocksymbol">A.30057053</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">O.00082314</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">O.00175295</category>
   	   	<category domain="http://rss.financialcontent.com/stocksymbol">SNPS</category>
   	  </item>
  <item>
   <title>Synopsys Showcases Comprehensive Autonomous Engineering Workflows from Silicon to Systems, Developed with NVIDIA Technology</title>
   <link>http://www.streetinsider.com/Press+Releases/Synopsys+Showcases+Comprehensive+Autonomous+Engineering+Workflows+from+Silicon+to+Systems%2C+Developed+with+NVIDIA+Technology/26814896.html</link>
   <description>
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&lt;p class=&quot;prntac&quot;&gt;&lt;i&gt;New long-running, fully agentic workflows spanning EDA to CAE multiply engineering productivity &lt;/i&gt;&lt;/p&gt;&lt;p&gt;&lt;b&gt;Key Highlights&lt;/b&gt;&lt;/p&gt;&lt;ul type=&quot;disc&quot;&gt;&lt;li&gt;&lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys&lt;/span&gt; unveils a fully autonomous long-running design verification agent that orchestrates the entire chip verification cycle delivering up to 50X faster time-to-validated RTL while achieving 20% additional coverage improvement&lt;/li&gt;&lt;li&gt;Demonstrating Synopsys' first fully autonomous computer-aided engineering (CAE) workflow for thermal management and electronic device cooling capable of autonomously executing set-up, pre-processing, and post-processing in a fraction of the time required for manual approaches &lt;/li&gt;&lt;li&gt;Expanded portfolio of more than 20 GPU-accelerated Synopsys EDA and multiphysics products, including 18X speedup of &lt;a target=&quot;_blank&quot; href=&quot;https://edge.prnewswire.com/c/link/?t=0&amp;amp;l=en&amp;amp;o=4738942-1&amp;amp;h=2407958161&amp;amp;u=https%3A%2F%2Fwww.synopsys.com%2Fimplementation-and-signoff%2Fams-simulation%2Fprimesim-spice.html&amp;amp;a=PrimeSim%E2%84%A2+SPICE&quot; target=&quot;_blank&quot;</description>
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   <pubDate>Sun, 26 Jul 2026 20:45:00 -0400</pubDate>
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   <title>Synopsys Showcases Comprehensive Autonomous Engineering Workflows from Silicon to Systems, Developed with NVIDIA Technology</title>
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&lt;p class=&quot;prntac&quot;&gt;&lt;i&gt;New long-running, fully agentic workflows spanning EDA to CAE multiply engineering productivity &lt;/i&gt;&lt;/p&gt;&lt;p&gt;&lt;b&gt;Key Highlights&lt;/b&gt;&lt;/p&gt;&lt;ul type=&quot;disc&quot;&gt;&lt;li&gt;&lt;span value=&quot;NASDAQ-NMS:SNPS&quot; idsrc=&quot;xmltag.org&quot; &gt;Synopsys&lt;/span&gt; unveils a fully autonomous long-running design verification agent that orchestrates the entire chip verification cycle delivering up to 50X faster time-to-validated RTL while achieving 20% additional coverage improvement&lt;/li&gt;&lt;li&gt;Demonstrating Synopsys' first fully autonomous computer-aided engineering (CAE) workflow for thermal management and electronic device cooling capable of autonomously executing set-up, pre-processing, and post-processing in a fraction of the time required for manual approaches &lt;/li&gt;&lt;li&gt;Expanded portfolio of more than 20 GPU-accelerated Synopsys EDA and multiphysics products, including 18X speedup of &lt;a target=&quot;_blank&quot; href=&quot;https://edge.prnewswire.com/c/link/?t=0&amp;amp;l=en&amp;amp;o=4738942-1&amp;amp;h=2407958161&amp;amp;u=https%3A%2F%2Fwww.synopsys.com%2Fimplementation-and-signoff%2Fams-simulation%2Fprimesim-spice.html&amp;amp;a=PrimeSim%E2%84%A2+SPICE&quot; target=&quot;_blank&quot;</description>
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