Fujitsu and University of Toronto Develop World's First Digitally-Processed Gigabit-Class High-Speed Transceiver Chip Feb 10, 2010 10:59AM

Kawasaki, Japan, Feb 10, 2010 - (ACN Newswire) - Fujitsu Laboratories Ltd. and the University of Toronto today announced their joint development of a new processing method for transceiver chips used in gigabit-class(1) high-speed data transmission over wirelines. The new technology employs digital circuitry to replace previously-required structures that used analog circuits. While analog processing require circuits that are adapted to the specifications of a signal being transmitted, such as transmission distance and amplitude, this new digital approach can perform these optimizations automatically, so that a single circuit could be used to accommodate a wide range of various wireline communications. Compared to conventional processing methods, this new digital-processing method makes it possible to shorten development periods by approximately half. It is anticipated that this new technology in the future could be applied to a variety of wireline communication applications, including 10 Gbps high-speed Ethernet in datacenters.

Details of this technology were presented at the IEEE International Solid-State Circuits Conference 2010 (ISSCC 2010) being held in San Francisco from February 7-11. (Presentation number: 8.7)

Background and Technological Challenges

File size data volumes for large photographic, audio, and video files are becoming increasingly larger, thus requiring a significant amount of bandwidth to transmit, leading to demand for ever-faster wireline data communications. Conventional transceiver chips rely on analog circuitry which needs to be optimized to accommodate specifications of the signal being transmitted - such as transmission distance and amplitude - and therefore require multiple transceiver chips to be designed in order to accommodate for various applications.

With a growing diversity of devices featuring high-speed data transmission, the need to optimize an existing technology for every new type of device or model has become a bottleneck in the development process. Efforts to develop transceiver chips within short development periods that can accommodate the wide range of different devices have been proven challenging.

Newly-developed Technology

Fujitsu Laboratories and the University of Toronto have developed a digital circuit-based transceiver chip. Featuring digital circuitry, the new transceiver chip can automatically optimize itself for a variety of high-speed communications circuits, thus significantly reducing development periods by approximately half compared with conventional methods.

This technology detects variations in the delay on the time axis of the input signal, caused during data transmission, and based on that can automatically adjust the timing it uses for judging whether an incoming signal is a 0 or 1 (Figure 1). Since variations in data transmissions increase along with faster transmission speeds, this new technology is essential for accurate data exchange. This is the world's first technology to achieve Gbps-class speeds without the use of analog circuitry elements, while offering fully-digital timing adjustments for signal-determination.

Results

As a world's first, by using digital circuitry-based high-speed transceiver technology, Fujitsu Laboratories and the University of Toronto's new technology makes it possible to reduce the design and development period for a gigabit-class transceiver chip by approximately one-half (1/2) compared with conventional methods. This suggests that transceiver chips for a wide range of communications devices could be offered in a timely manner.

Future Developments

Fujitsu Laboratories and the University of Toronto will continue with development of this technology to optimize the digital signal processing, to further reduce the transceiver's power consumption.

Glossary and Notes

1 Gigabit-class/Gigabits-per-second (Gbps):Gigabits-per-second (Gbps) expresses data rate and indicates how many gigabits can be transferred per second. 10 Gbps is 10 billion bits-per-second (10 billion bps) = 10,000 megabits-per-second (10,000 Mbps), and indicates that 10 billion bits of data can be transferred per second.

About University of Toronto

Established in 1827, the University of Toronto is Canada's largest university, recognized as a global leader in research and teaching. U of T's distinguished faculty, institutional record of groundbreaking scholarship and wealth of innovative academic opportunities continually attract outstanding students and academics from around the world. U of T is committed to providing a learning experience that benefits from both a scale almost unparalleled in North America and from the close-knit learning communities made possible through its college system and academic divisions. Located in and around Toronto, one of the world's most diverse regions, U of T's vibrant academic life is defined by a unique degree of cultural diversity in its learning community. The University is sustained environmentally by three green campuses, where renowned heritage buildings stand beside award-winning innovations in architectural design.

For more information: http://www.utoronto.ca/

About Fujitsu Ltd

Fujitsu is a leading provider of IT-based business solutions for the global marketplace. With approximately 160,000 employees supporting customers in 70 countries, Fujitsu combines a worldwide corps of systems and services experts with highly reliable computing and communications products and advanced microelectronics to deliver added value to customers. Headquartered in Tokyo, Fujitsu Limited (TSE: 6702) reported consolidated revenues of 4.6 trillion yen (US$47 billion) for the fiscal year ended March 31, 2009. For more information, please visit www.fujitsu.com.


Contact: Fujitsu Laboratories Ltd.
Design Solutions Lab.
Platform Technologies Lab.
Tel: +81-44-754-2635
E-mail:hsio_adc_pr@ml.labs.fujitsu.com

University of Toronto
Prof. Ali Sheikholeslami
Dept. of Electrical and Computer Engineering
Tel: +1(416)978-1681
E-mail:ali@eecg.utoronto.ca
Address: 10 King's College Road, Toronto, Ontario, M5S 3G4

Copyright 2010 ACN Newswire. All rights reserved.


Fujitsu and University of Toronto Develop High-Reliability Read-Method for Spin-Torque-Transfer MRAM Feb 10, 2010 10:54AM

Kawasaki, Japan, Feb 10, 2010 - (ACN Newswire) - Fujitsu Laboratories Limited and the University of Toronto today announced that they have jointly developed the world's first high-reliability read-method for use with spin-torque-transfer (STT) MRAM(1) that is insusceptible to erroneous writes. STT MRAM is regarded as a potential future form of non-volatile memory(2) that could be used as an alternative to flash memory. NOR flash memory that is embedded in microcontrollers widely used in mobile phones and other electronic devices is expected to reach the limits of its feasible miniaturization in the near future, which has led to the search for an alternative low-power non-volatile memory that will allow continued necessary miniaturization. By resolving one of the major obstacles to using STT MRAM, Fujitsu and the University of Toronto's new read-method marks a major step towards the practical implementation of STT MRAM as a necessary replacement for flash memory, in view of future requirements that will be necessary for compact and low-power electronic devices.

Details of this technology were presented at the IEEE International Solid-State Circuits Conference 2010 (ISSCC 2010) being held in San Francisco from February 7-11. (Presentation number: 14.1)

Background

Many electronic devices such as mobile phones or PDAs use microcontrollers with embedded flash memory, which allows onboard software to be rewritten. However, NOR flash memory used in such microcontrollers is nearing the physical limits of its miniaturization, which has led to research on various types of memory that could replace NOR flash memory.

STT MRAM, which uses magnetic materials as the memory storage element, is gaining attention as an emerging potential candidate to replace flash memory, as STT MRAM meets the needs for speed, low power consumption, and miniaturization that would make it a good candidate to replace flash memory.

Technological Challenges

STT MRAM uses memory storage elements that take advantage of the effect in which a current that is passed through a magnetic material - such as a magnetic tunnel junction (MTJ)(3) - reverses its direction of magnetization (Figure 1). Passing a current through the MTJ causes its direction of magnetization to switch between a parallel or anti-parallel state, which has the effect of switching between low resistance and high resistance. Because this can be used to represent the 1s and 0s of digital information, STT MRAM can be used as a non-volatile memory.

Reading STT MRAM involves applying a voltage to the MTJ to discover whether the MTJ offers high resistance to current ("1") or low ("0"). However, a relatively high voltage needs to be applied to the MTJ to correctly determine whether its resistance is high or low, and the current passed at this voltage leaves little difference between the read-current and the write-current. Any fluctuation in the electrical characteristics of individual MTJs could cause what was intended as a read-current, to have the effect of a write-current, thus reversing the direction of magnetization of the MTJ.

Newly-developed Technology

In a joint collaboration, Fujitsu Laboratories and the University of Toronto have developed an innovative circuit design (Figure 3) that for the first time resolves the issue of erroneous writes in STT MRAM during read operations.

The newly developed read-method uses a negative resistance(4) that is intermediate between the MTJ's high resistance and low resistance on a parallel circuit (Figure 4). If the MTJ is in a high-resistance state, this circuit exhibits negative-resistance characteristics. If the MTJ is in a low-resistance state, then it exhibits normal-resistance characteristics. These characteristics allow the resistance value to be read at lower voltages than before, suppressing the tendency of the read operation to reverse the direction of magnetization and avoiding the problem of erroneous write operations.

Results

The development of this new read circuit with negative resistance has resulted in STT MRAM that is insusceptible to erroneous writes caused by fluctuations in the electrical characteristics of the MTJs. It is anticipated that the STT MRAM used as miniaturized non-volatile memory would enable greater high-performance in mobile phones and other electronic devices.

Future Developments

Fujitsu Laboratories and the University of Toronto plan to continue with R&D related to STT MRAM to strive toward practical implementation, such as lowering write currents and developing process technologies for further miniaturization.

Glossary and Notes

1 Spin- Torque-Transfer MRAM:Spin-torque-transfer magnetoresistive (STT) random access memory. MRAM that uses the "spin-torque-transfer" effect to reverse the direction of magnetization of an element by passing current through it.

2 Non-volatile memory:Memory that persists even when electrical power is cut.

3 Magnetic tunnel junction (MJT):A tunnel junction that uses the magnetoresistive effect. Consists of a recording layer made of ferromagnetic material, an insulating film a few atoms thick, and a layer made of ferromagnetic material that will not change its direction of magnetization in the presence of a current.

4 Negative resistance:An element that has negative resistance value, in which its current decreases when voltage rises.

About University of Toronto

Established in 1827, the University of Toronto is Canada's largest university, recognized as a global leader in research and teaching. U of T's distinguished faculty, institutional record of groundbreaking scholarship and wealth of innovative academic opportunities continually attract outstanding students and academics from around the world. U of T is committed to providing a learning experience that benefits from both a scale almost unparalleled in North America and from the close-knit learning communities made possible through its college system and academic divisions. Located in and around Toronto, one of the world's most diverse regions, U of T's vibrant academic life is defined by a unique degree of cultural diversity in its learning community. The University is sustained environmentally by three green campuses, where renowned heritage buildings stand beside award-winning innovations in architectural design.

For more information: http://www.utoronto.ca/

About Fujitsu Ltd

Fujitsu is a leading provider of IT-based business solutions for the global marketplace. With approximately 160,000 employees supporting customers in 70 countries, Fujitsu combines a worldwide corps of systems and services experts with highly reliable computing and communications products and advanced microelectronics to deliver added value to customers. Headquartered in Tokyo, Fujitsu Limited (TSE: 6702) reported consolidated revenues of 4.6 trillion yen (US$47 billion) for the fiscal year ended March 31, 2009. For more information, please visit www.fujitsu.com.


Contact: Fujitsu Laboratories Ltd.
Technology Integration Lab.
Platform Technologies Lab.
Tel: +81(46)250-8379
E-mail:til-si@ml.labs.fujitsu.com

University of Toronto
Prof. Ali Sheikholeslami
Dept. of Electrical and Computer Engineering
Tel: +1(416)978-1681
E-mail:ali@eecg.utoronto.ca
Address: 10 King's College Road, Toronto, Ontario, M5S 3G4 Canada

Copyright 2010 ACN Newswire. All rights reserved.


Net Asset Value(s) Feb 10, 2010 06:40AM

LONDON--(BUSINESS WIRE)--


FUND                       db x-trackers DB HEDGE FUND INDEX ETF

DEALING DATE               05-Feb-10

NAV PER SHARE              GBP10.7707

NUMBER OF SHARES IN ISSUE  1,450,000

CODE




    Source: db x-trackers DB HEDGE FUND INDEX ETF SHARECLASS 3C


Net Asset Value(s) Feb 10, 2010 06:39AM

LONDON--(BUSINESS WIRE)--


FUND                       db x-trackers DB HEDGE FUND INDEX ETF

DEALING DATE               05-Feb-10

NAV PER SHARE              USD10.7862

NUMBER OF SHARES IN ISSUE  16,250,000

CODE




    Source: db x-trackers DB HEDGE FUND INDEX ETF SHARECLASS 2C


Intermap Technologies Appoints Chief Financial Officer Feb 10, 2010 06:33AM

DENVER--(BUSINESS WIRE)-- Intermap Technologies today announced the appointment of Brian Musfeldt, CPA, to the position of vice president and chief financial officer, effective March 1, 2010. Mr. Musfeldt replaces outgoing senior vice president and CFO, Richard Mohr, who remains with the Company until February 28, 2010 to ensure a seamless transition and the completion of the 2009 year-end financial reporting.

Since joining the Company in 2006, Mr. Musfeldt spent the past four years working alongside Intermap's CFO as the Company's corporate controller, helping to build and lead an exceptional accounting and finance team. Mr. Musfeldt has been responsible for preparing all public reporting requirements for the Toronto Stock Exchange, financial reporting, budget and treasury requirements, international consolidation, internal and external audits, implementation and compliance of Multilateral Instrument 52-109, tax filings, and the day-to-day leadership of the Company's international accounting and finance organization.

"Brian Musfeldt's financial reporting skills and experience have been a valuable asset to Intermap," stated Brian Bullock, Intermap's president and CEO. "Brian's intimate knowledge of the Company and its finances acquired over the past four years make Brian a logical choice for the CFO role and will ensure continued excellence in financial operations and financial reporting as we move forward."

In this role, Mr. Musfeldt will assume responsibility for financial and treasury operations - including investor relations activities and will appoint a new controller to take over his current responsibilities.

Prior to Intermap, Mr. Musfeldt was the vice president and corporate controller at Wire One Communications. Prior to Wire One, he developed an extensive background in mergers and acquisitions and internal audit serving in a due diligence & internal audit role with a private firm, Gores Technology Group. Brian started his career at KPMG LLP/Arthur Andersen LLP working as an audit manager in the high-tech and emerging markets practice.

Brian received his Bachelor of Science in Business Administration - Accounting from the University of Colorado at Boulder and holds a Certified Public Accountant designation.

About Intermap Technologies

Intermap (TSX: IMP.TO) is a preeminent digital mapping and geospatial solutions provider that has set the industry standard for creating uniform high-resolution 3D digital models of the earth's surface. The Company has proactively remapped entire countries and built uniform national databases, called NEXTMap(R), consisting of affordably priced elevation data and geometric images of unprecedented accuracy. Demand for NEXTMap data is growing as new commercial applications emerge within the GIS, engineering, automotive, GPS maps, insurance risk assessment, oil and gas, hydrology, renewable energy, environmental planning, wireless communications, transportation, aviation, and 3D visualization markets.

Headquartered in Denver, Colorado, Intermap has offices in Australia, Calgary, Detroit, Jakarta, London, Munich, Ottawa, Prague, and Washington D.C. For more information, visit www.Intermap.com, www.mobile.AccuTerra.com, or www.AccuTerra.com.

NEXTMap(R) and AccuTerra(R) are registered trademarks of Intermap Technologies Corporation.

Intermap Reader Advisory

This news release contains certain forward-looking statements, which include certain assumptions with respect to the future business and operations of the Company. The reader is cautioned that assumptions used in the preparation of such information may prove to be incorrect. All such forward-looking statements involve substantial known and unknown risks and uncertainties, certain of which are beyond the Company's control. The Company's actual results, performance or achievements could differ materially from those expressed in, or implied by, these forward-looking statements and, accordingly, no assurances can be given that any of the events anticipated by the forward-looking statements will transpire or occur, or if any of them do so, what benefits that the Company will derive therefrom. All subsequent forward-looking statements, whether written or oral, attributable to the Company or persons acting on its behalf are expressly qualified in their entirety by these cautionary statements. Furthermore, the forward-looking statements contained in this news release are made as at the date of this news release and the Company does not undertake any obligation to update publicly or to revise any of the included forward-looking statements, whether as a result of new information, future events or otherwise, except as may be required by applicable securities laws.

The TSX has not reviewed and does not accept responsibility for the adequacy or accuracy of this release.


    Source: Intermap Technologies


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