Press Releases

Kawasaki, Japan, Feb 10, 2010 - (ACN Newswire) - Fujitsu Laboratories Ltd. and the University of Toronto today announced their joint development of a new processing method for transceiver chips used in gigabit-class(1) high-speed data transmission over wirelines. The new technology employs digital circuitry to replace previously-required structures that used analog circuits. While analog processing require circuits that are adapted to the specifications of a signal being transmitted, such as transmission distance and amplitude, this new digital approach can perform these optimizations automatically, so that a single circuit could be used to accommodate a wide range of various wireline communications. Compared to conventional processing methods, this new digital-processing method makes it possible to shorten development periods by approximately half. It is anticipated that this new technology in the future could be applied to a variety of wireline communication applications, including 10 Gbps high-speed Ethernet in datacenters.

Details of this technology were presented at the IEEE International Solid-State Circuits Conference 2010 (ISSCC 2010) being held in San Francisco from February 7-11. (Presentation number: 8.7)

Background and Technological Challenges

File size data volumes for large photographic, audio, and video files are becoming increasingly larger, thus requiring a significant amount of bandwidth to transmit, leading to demand for ever-faster wireline data communications. Conventional transceiver chips rely on analog circuitry which needs to be optimized to accommodate specifications of the signal being transmitted - such as transmission distance and amplitude - and therefore require multiple transceiver chips to be designed in order to accommodate for various applications.

With a growing diversity of devices featuring high-speed data transmission, the need to optimize an existing technology for every new type of device or model has become a bottleneck in the development process. Efforts to develop transceiver chips within short development periods that can accommodate the wide range of different devices have been proven challenging.

Newly-developed Technology

Fujitsu Laboratories and the University of Toronto have developed a digital circuit-based transceiver chip. Featuring digital circuitry, the new transceiver chip can automatically optimize itself for a variety of high-speed communications circuits, thus significantly reducing development periods by approximately half compared with conventional methods.

This technology detects variations in the delay on the time axis of the input signal, caused during data transmission, and based on that can automatically adjust the timing it uses for judging whether an incoming signal is a 0 or 1 (Figure 1). Since variations in data transmissions increase along with faster transmission speeds, this new technology is essential for accurate data exchange. This is the world's first technology to achieve Gbps-class speeds without the use of analog circuitry elements, while offering fully-digital timing adjustments for signal-determination.

Results

As a world's first, by using digital circuitry-based high-speed transceiver technology, Fujitsu Laboratories and the University of Toronto's new technology makes it possible to reduce the design and development period for a gigabit-class transceiver chip by approximately one-half (1/2) compared with conventional methods. This suggests that transceiver chips for a wide range of communications devices could be offered in a timely manner.

Future Developments

Fujitsu Laboratories and the University of Toronto will continue with development of this technology to optimize the digital signal processing, to further reduce the transceiver's power consumption.

Glossary and Notes

1 Gigabit-class/Gigabits-per-second (Gbps):Gigabits-per-second (Gbps) expresses data rate and indicates how many gigabits can be transferred per second. 10 Gbps is 10 billion bits-per-second (10 billion bps) = 10,000 megabits-per-second (10,000 Mbps), and indicates that 10 billion bits of data can be transferred per second.

About University of Toronto

Established in 1827, the University of Toronto is Canada's largest university, recognized as a global leader in research and teaching. U of T's distinguished faculty, institutional record of groundbreaking scholarship and wealth of innovative academic opportunities continually attract outstanding students and academics from around the world. U of T is committed to providing a learning experience that benefits from both a scale almost unparalleled in North America and from the close-knit learning communities made possible through its college system and academic divisions. Located in and around Toronto, one of the world's most diverse regions, U of T's vibrant academic life is defined by a unique degree of cultural diversity in its learning community. The University is sustained environmentally by three green campuses, where renowned heritage buildings stand beside award-winning innovations in architectural design.

For more information: http://www.utoronto.ca/

About Fujitsu Ltd

Fujitsu is a leading provider of IT-based business solutions for the global marketplace. With approximately 160,000 employees supporting customers in 70 countries, Fujitsu combines a worldwide corps of systems and services experts with highly reliable computing and communications products and advanced microelectronics to deliver added value to customers. Headquartered in Tokyo, Fujitsu Limited (TSE: 6702) reported consolidated revenues of 4.6 trillion yen (US$47 billion) for the fiscal year ended March 31, 2009. For more information, please visit www.fujitsu.com.

Contact: Fujitsu Laboratories Ltd.
Design Solutions Lab.
Platform Technologies Lab.
Tel: +81-44-754-2635
E-mail:hsio_adc_pr@ml.labs.fujitsu.com

University of Toronto
Prof. Ali Sheikholeslami
Dept. of Electrical and Computer Engineering
Tel: +1(416)978-1681
E-mail:ali@eecg.utoronto.ca
Address: 10 King's College Road, Toronto, Ontario, M5S 3G4

Copyright 2010 ACN Newswire. All rights reserved.

LONDON--(BUSINESS WIRE)--

Please be advised that the below has been processed

Value      CCY  ISIN          Issuer Name     Repurchase Amount  New Amount
Date                                                             Outstanding

                              Abbey National
05-Feb-10  EUR  XS0411042871  Treasury        50,000.00          2,600,000.00
                              Services Plc

    Source: Citibank

Kawasaki, Japan, Feb 10, 2010 - (ACN Newswire) - Fujitsu Laboratories Limited and the University of Toronto today announced that they have jointly developed the world's first high-reliability read-method for use with spin-torque-transfer (STT) MRAM(1) that is insusceptible to erroneous writes. STT MRAM is regarded as a potential future form of non-volatile memory(2) that could be used as an alternative to flash memory. NOR flash memory that is embedded in microcontrollers widely used in mobile phones and other electronic devices is expected to reach the limits of its feasible miniaturization in the near future, which has led to the search for an alternative low-power non-volatile memory that will allow continued necessary miniaturization. By resolving one of the major obstacles to using STT MRAM, Fujitsu and the University of Toronto's new read-method marks a major step towards the practical implementation of STT MRAM as a necessary replacement for flash memory, in view of future requirements that will be necessary for compact and low-power electronic devices.

Details of this technology were presented at the IEEE International Solid-State Circuits Conference 2010 (ISSCC 2010) being held in San Francisco from February 7-11. (Presentation number: 14.1)

Background

Many electronic devices such as mobile phones or PDAs use microcontrollers with embedded flash memory, which allows onboard software to be rewritten. However, NOR flash memory used in such microcontrollers is nearing the physical limits of its miniaturization, which has led to research on various types of memory that could replace NOR flash memory.

STT MRAM, which uses magnetic materials as the memory storage element, is gaining attention as an emerging potential candidate to replace flash memory, as STT MRAM meets the needs for speed, low power consumption, and miniaturization that would make it a good candidate to replace flash memory.

Technological Challenges

STT MRAM uses memory storage elements that take advantage of the effect in which a current that is passed through a magnetic material - such as a magnetic tunnel junction (MTJ)(3) - reverses its direction of magnetization (Figure 1). Passing a current through the MTJ causes its direction of magnetization to switch between a parallel or anti-parallel state, which has the effect of switching between low resistance and high resistance. Because this can be used to represent the 1s and 0s of digital information, STT MRAM can be used as a non-volatile memory.

Reading STT MRAM involves applying a voltage to the MTJ to discover whether the MTJ offers high resistance to current ("1") or low ("0"). However, a relatively high voltage needs to be applied to the MTJ to correctly determine whether its resistance is high or low, and the current passed at this voltage leaves little difference between the read-current and the write-current. Any fluctuation in the electrical characteristics of individual MTJs could cause what was intended as a read-current, to have the effect of a write-current, thus reversing the direction of magnetization of the MTJ.

Newly-developed Technology

In a joint collaboration, Fujitsu Laboratories and the University of Toronto have developed an innovative circuit design (Figure 3) that for the first time resolves the issue of erroneous writes in STT MRAM during read operations.

The newly developed read-method uses a negative resistance(4) that is intermediate between the MTJ's high resistance and low resistance on a parallel circuit (Figure 4). If the MTJ is in a high-resistance state, this circuit exhibits negative-resistance characteristics. If the MTJ is in a low-resistance state, then it exhibits normal-resistance characteristics. These characteristics allow the resistance value to be read at lower voltages than before, suppressing the tendency of the read operation to reverse the direction of magnetization and avoiding the problem of erroneous write operations.

Results

The development of this new read circuit with negative resistance has resulted in STT MRAM that is insusceptible to erroneous writes caused by fluctuations in the electrical characteristics of the MTJs. It is anticipated that the STT MRAM used as miniaturized non-volatile memory would enable greater high-performance in mobile phones and other electronic devices.

Future Developments

Fujitsu Laboratories and the University of Toronto plan to continue with R&D related to STT MRAM to strive toward practical implementation, such as lowering write currents and developing process technologies for further miniaturization.

Glossary and Notes

1 Spin- Torque-Transfer MRAM:Spin-torque-transfer magnetoresistive (STT) random access memory. MRAM that uses the "spin-torque-transfer" effect to reverse the direction of magnetization of an element by passing current through it.

2 Non-volatile memory:Memory that persists even when electrical power is cut.

3 Magnetic tunnel junction (MJT):A tunnel junction that uses the magnetoresistive effect. Consists of a recording layer made of ferromagnetic material, an insulating film a few atoms thick, and a layer made of ferromagnetic material that will not change its direction of magnetization in the presence of a current.

4 Negative resistance:An element that has negative resistance value, in which its current decreases when voltage rises.

About University of Toronto

Established in 1827, the University of Toronto is Canada's largest university, recognized as a global leader in research and teaching. U of T's distinguished faculty, institutional record of groundbreaking scholarship and wealth of innovative academic opportunities continually attract outstanding students and academics from around the world. U of T is committed to providing a learning experience that benefits from both a scale almost unparalleled in North America and from the close-knit learning communities made possible through its college system and academic divisions. Located in and around Toronto, one of the world's most diverse regions, U of T's vibrant academic life is defined by a unique degree of cultural diversity in its learning community. The University is sustained environmentally by three green campuses, where renowned heritage buildings stand beside award-winning innovations in architectural design.

For more information: http://www.utoronto.ca/

About Fujitsu Ltd

Fujitsu is a leading provider of IT-based business solutions for the global marketplace. With approximately 160,000 employees supporting customers in 70 countries, Fujitsu combines a worldwide corps of systems and services experts with highly reliable computing and communications products and advanced microelectronics to deliver added value to customers. Headquartered in Tokyo, Fujitsu Limited (TSE: 6702) reported consolidated revenues of 4.6 trillion yen (US$47 billion) for the fiscal year ended March 31, 2009. For more information, please visit www.fujitsu.com.

Contact: Fujitsu Laboratories Ltd.
Technology Integration Lab.
Platform Technologies Lab.
Tel: +81(46)250-8379
E-mail:til-si@ml.labs.fujitsu.com

University of Toronto
Prof. Ali Sheikholeslami
Dept. of Electrical and Computer Engineering
Tel: +1(416)978-1681
E-mail:ali@eecg.utoronto.ca
Address: 10 King's College Road, Toronto, Ontario, M5S 3G4 Canada

Copyright 2010 ACN Newswire. All rights reserved.

NEW YORK--(BUSINESS WIRE)-- Fitch Ratings has taken the following rating action on Ryland Acceptance Corp. IV:

Ryland Acceptance Corp. IV, series 99

--Class F downgraded to 'C/RR6' from 'AAA'.

The December 2009 remittance report indicates the class F certificate is significantly under-collateralized. The December 2009 remittance reports the balance of the class F bond as $4,569,156. The collateral pool supporting class F currently consists of 11 FHLMC and FNMA bonds with a total current bond balance of $203,014. The downgrade to 'C/RR6' was based on the large level of under-collateralization and the limited recovery prospects.

The remittance report indicates original balance of the class F certificate to be $24,749,902. At origination the collateral pool consisted of eight FHLMC certificates, 29 FNMA certificates, and Structured Asset Securities Corporation (SASCO) series 1991-1 class NB. SASCO 1991-1 class NB was secured by GNMA certificates. The original collateral balance of these certificates was $24,886,437.

Additional details are available in the following research, also available at 'www.fitchratings.com':

--'U.S. RMBS Criteria for Recovery Ratings' (Dec. 16, 2009);

--'U.S. RMBS Rating Criteria (Dec. 3, 2009);

--'Global Structured Finance Rating Criteria' (Sept. 30, 2009);

--'Criteria for Structured Finance Recovery Ratings'(Aug. 17, 2009).

Additional information is available at www.fitchratings.com.

ALL FITCH CREDIT RATINGS ARE SUBJECT TO CERTAIN LIMITATIONS AND DISCLAIMERS. PLEASE READ THESE LIMITATIONS AND DISCLAIMERS BY FOLLOWING THIS LINK: HTTP://FITCHRATINGS.COM/UNDERSTANDINGCREDITRATINGS. IN ADDITION, RATING DEFINITIONS AND THE TERMS OF USE OF SUCH RATINGS ARE AVAILABLE ON THE AGENCY'S PUBLIC WEBSITE 'WWW.FITCHRATINGS.COM'. PUBLISHED RATINGS, CRITERIA AND METHODOLOGIES ARE AVAILABLE FROM THIS SITE AT ALL TIMES. FITCH'S CODE OF CONDUCT, CONFIDENTIALITY, CONFLICTS OF INTEREST, AFFILIATE FIREWALL, COMPLIANCE AND OTHER RELEVANT POLICIES AND PROCEDURES ARE ALSO AVAILABLE FROM THE 'CODE OF CONDUCT' SECTION OF THIS SITE.

    Source: Fitch Ratings